The present invention relates to a method for doping a semiconductor layer, a method for manufacturing a thin film semiconductor device, method for controlling resistance of a semiconductor layer, and a thin film semiconductor device, and more particularly, a doping method using a crystallized semiconductor layer by excimer laser anneal, a method for manufacturing a thin film semiconductor device such as a thin film transistor, a thin film semiconductor device in which a semiconductor layer made of such as polycrystalline silicon is used as a channel.
With progress of an advanced information age, the importance of input/output devices is increasing rapidly and the devices are in demand to include advanced and sophisticated features. Furthermore, the spread of personal digital assistant machines is remarkable in recent years, and consequently, the technology of producing TFT on a plastic substrate with more excellent weight saving, flexibility, and non-destructivity rather compared with a glass substrates is desired. In such a situation, research and development of active matrix liquid crystal display devices (AM-LCD) using a thin film transistor (TFT) and contact image sensors (CIS) and the like are actively done.
The thin film transistors, in which a semiconductor film made of silicon is used as a channel, can be classified by a material used in order to form a carrier-transporting layer (active layer), that is, a semiconductor film made of amorphous silicon (a-Si) and a semiconductor film made of polycrystalline silicon having a crystal phase. Polysilicon (poly-Si) or microcrystal silicon (μc-Si) is mainly known as the polycrystalline silicon.
Semiconductors made of the polycrystalline silicon such as polysilicon (poly-Si) or microcrystal silicon (μc-Si) are characterized by the carrier mobility from about 10 to 100 times as high as that of semiconductors made of amorphous silicon, and have very excellent characteristics as a composition material of switching elements. Moreover, the thin film transistors using the polycrystalline silicon for the active layer allow high-speed operation, and therefore are getting most of the attention as the switching elements constituting various logical circuits (for example, a domino logic circuit, a CMOS (Complementary Metal Oxide Semiconductor) transmission gate circuit), multiplexers using these circuits, EPROM (Erasable and Programmable Read Only Memory), EEPROM (Electrically Erasable and Programmable Read Only Memory), CCD (Charge Coupled Device), RAM (Random Access Memory), drive circuits of displays such as a liquid crystal display and an electroluminescent display, and the like in recent years. Moreover, recently, remarkable are active matrix liquid crystal displays employing the thin film transistor (TFT), using such polysilicon for a channel semiconductor film, as the switching element and as a peripheral drive circuit. This is because the constitution of a thin film transistor array, making use of a polysilicon semiconductor film which can be formed at a low temperature on a cheap amorphous glass substrate, may allow to implement reflective panel displays or wide, high-finesse, high-definition and cheap panel displays (for example, a flat type television).
On the other hand, when using poly-Si TFT in switching elements for pixel selection of the liquid crystal display or the like, the off current is high and display quality is low, which is a problem. In conventional MOS transistors using single crystal silicon, when a gate reverse bias is applied to a gate, a leakage current does not increase, since the channel become a opposite polarity with a source or a drain, a depletion layer is formed and enough pressure-proofing and rectification property is shown. However, with the poly-Si TFT, a problem arises that a high leakage current occurs since current flows through the grain boundary of crystalline particles composing the semiconductor film or through the defects of the particles themselves. Furthermore, since the MOS transistors are not used under very high gate reverse bias, the leakage current has not become a problem. However, in the poly-Si TFT using for the active matrix liquid crystal displays, for example, the leakage current poses a big problem since it is used under the reverse bias of about 10 V or more. Such a problem is especially important for the thin film transistor for pixel selection of the liquid crystal displays in which the poly-Si is used.
In order to reduce the leakage current, it is effective to relax the electric field in the drain edge, and it has been known that LDD (Lightly Doped Drain) structure is effective (General Conference of The Institute of Electronics and Communication Engineers, 2–20, pp. 271, 1978). The structure forms the region which activated the impurities under a low dose such as 1×1014/cm2 or less in the edge of the drain region to relaxes the electric field in the edge of the drain region.
The thin film transistor having the LDD structure is formed, for example, by the following processes so far. First, an amorphous silicon containing hydrogen (a-Si:H) film is formed on a glass substrate, and is dehydrogenated by the lamp anneal. Then, a polysilicon (poly-Si) semiconductor film is formed by crystallizing the amorphous silicon film by laser irradiation. Then, a gate insulating film and a gate electrode are formed, and heavy doping of impurity ion is performed by using the gate electrode as a mask where the gate electrode has already been patterned to cover a channel region and an LDD region. Subsequently, the gate electrode is patterned again to cover only the channel region. Further, light doping of impurity ion is performed by using the re-patterned gate electrode as a mask. Consequently, source and drain regions having the LDD structure is formed. Such processes have been disclosed in Japanese Unexamined Patent Application No. 2000-228526.
When forming the thin film transistor having the LDD structure by such a method, there is a problem of the difference or the variation in lengths of the LDDs on both sides of the channel region (thicknesses of the LDD regions between the channel regions and contact regions) due to deviation of the mask during patterning of the gate electrode, and the like. This causes other problems that the characteristics of the thin film transistor vary and the productivity of the thin film transistor decrease. Moreover, the LDD lengths cannot be set to about 2 μm or less in order to secure a mask alignment margin. For this reason, the resistance of the LDD regions becomes high, and the carrier mobility decreases, which is a problem. Therefore, it is important to develop the self-alignment type process where the controllability of the LDD lengths is enough at a low dose such as 1×1014/cm2 or less.
By the way, as for the poly-Si TFT, the highest process temperature reaches about 1000° C. in the manufacturing process. Therefore, silica glasses or the like having an excellent heat resistance are used as an insulating substrate for manufacturing the poly-Si TFT. That is, it is difficult to use a glass substrate with a comparatively low melting point in the manufacturing process. However, for a cost reduction of the liquid crystal displays, the use of the glass plate materials with a low melting point is indispensable. Then, in recent years, the development of the so-called low temperature process with the highest process temperature of 600° C. or below is making progress, and the production of such devices is practically done. Furthermore, recently, using a plastic substrate which is easy to form a larger area under lower temperature has been also examined. The deformation temperature of the plastic substrate is at most 200° C., even when formed from a heat resistant material. Therefore, when the substrate is formed from the plastic, all processes must be performed on the condition of super low temperature as compared with the conventional conditions, that is, at 200° C. or below.
With the larger type of liquid crystal display, in the low temperature process for the poly-Si TFT, the ion doping and the plasma doping, which allow doping impurities into the semiconductor thin film with a large area with a fine throughput, are used. The ion doping is the method of ionizing an impurity gas and then irradiating the impurity ion all at once onto the large area semiconductor thin film by accelerating electric field without performing a mass separation. The plasma doping is the method of ionizing an impurity gas and a deposition gas simultaneously, and deposit including the impurity ion on the substrate surface. On the other hand, ion implantation is the method of performing the mass separation of impurity ion, producing an ion beam of the separated ion and irradiating the ion beam onto the semiconductor thin film. Although the ion doping and the plasma doping are advantageous to the formation of the larger area type, these processes pose problems that the film can contain hydrogen in large quantities which can blow off and break the film at the time of crystallization by the excimer laser (ELA: Excimer Laser Anneal), and that it is difficult to perform the lower temperature process using the plastic substrate or the like at the required temperature for dehydrogenation (400° C.). Moreover, there is also a problem that these methods are not suitable for the self-alignment type process in principle.
By the way, the Laser-Induced Melting of Predeposited Impurity Doping (LIMPID) attracts attention recently as being a method in which doping can be done in a process at 200° C. or below. The LIMPID is the method of ionizing an impurity gas, adsorbing the impurity ion on the surface of the semiconductor thin film, and melting the ion into the film with an excimer laser, and attracts attention not only because the hydrogen cannot be entrapped into the film, but also because it is most appropriate to the self-alignment process as well as to the low temperature process (refer to Japanese Unexamined Patent Application No. SHO 61-138131, Japanese Unexamined Patent Application No. SHO 62-002531, Japanese Unexamined Patent Application No. SHO 62-264619, and Japanese Unexamined Patent Application No. HEI 9-293878).
With the LIMPID, the high dose such as from about 1×1015 to 1×1016/cm2 of the impurities can be electrically activated in the semiconductor thin film. However, in principle, it is difficult to precisely control the dose of 1×1014/cm2 or less of the impurities. Because the high dose of from about 1×1015 to 1×1016/cm2 of the impurities is activated by the excimer laser anneal, even when, for example, the impurity ion of an atomic layer are adsorbed on the top of Si surface. Furthermore, since the adsorption of the impurity ion of the atomic layer occurs for an extremely short time in the conventional methods, the control at the low dose is difficult.
FIG. 13 shows a sheet resistance ρs in a case where the anneal is performed by use of the excimer laser after adsorbing phosphorus by plasma irradiation. The sheet resistance ρs is measured by changing the partial pressure of phosphine (PH3) by an argon gas as an inert gas. The conditions of the plasma irradiation are as follows: the flow rate of argon gas is 5 to 150 sccm, the flow rate of phosphine and hydrogen is 3 to 10 sccm, the total pressure is 63 Pa (475 mTorr), the substrate temperature is 130° C., RF power is 20 W and the irradiation time is 1 minute. The anneal is performed by use of XeCl excimer laser of 308 nm in wavelength, with the energy density of 300 mJ/cm2 and the overlap ratio is 98%. As seen in FIG. 13, even when the partial pressure of phosphine is changed, the sheet resistance ρs changes little and it reveals that controlling the partial pressure cannot control the concentration of impurities in an impurity diffusion region.
On the other hand, the conventional ion implantation is the most appropriate to the self-alignment process and enables also the control at a low dose. Since the substrate temperature generally increases in the process for the silicon substrate, the method of attaching a cooling plate by the electrostatic chuck of the substrate and radiating heat from the back side thereof is taken in the process. However, it is difficult to apply such a method to the plastic substrate considering the thermal conductivity and electrical conductivity of the plastic substrate. Moreover, there are other problems that the impurities cannot be implanted into the semiconductor thin film with the large area all at once, and that the throughput gets worse in the manufacturing the large-sized liquid crystal displays.
The present invention has been achieved in view of the above problems. It is an object of the invention to provide a method for doping a semiconductor layer which can form a lower concentration impurity diffusion region under excellent controllability even when a low heat resistant substrate is used, a method for manufacturing a thin film semiconductor device, a method for controlling resistance of a semiconductor layer, and a thin film semiconductor device.